搜索资源列表
i2c_control
- 本文件是iic总线控制器的vhdl语言的源代码程序-2005/09 Bus Controller VHDL language source code procedures
i2c_p_altera
- IIc总线的源代码（vhdl语言），大家共享一下
iic_bus_example
- 使用vhdl构建的iic总线，对应与fpga的硬件开发平台
i2c_master_bit_ctrl
- 用VHDL硬件语言实现的iic顶层控制程序
iic_vhdl
- iic总线控制器VHDL实现 -- VHDL Source Files: i2c.vhd -- top level file i2c_control.vhd -- control function for the I2C master/slave shift.vhd -- shift register uc_interface.vhd -- uC interface function for an 8-bit 68000-like uC u
i2c_cores
- IIC总线协议，VHDL语言编写，可以直接使用-IIC bus protocol, VHDL language can be used directly
writrend
- 用VHDL语言写的IIC读写程序，已经编译过，不错-VHDL language used to write the IIC to read and write procedures, has been compiled, it is true
f2812I2C_EEPROM
- 用VHDL语言实现扩展IIC接口的功能，-VHDL language used to achieve the expansion of IIC interface functions,
baudgen_latest.tar
- 波特率发生器的VHDL源码。适用于uart、spi、IIC-Baud rate generator VHDL source code. Apply to uart, spi, IIC
write
- VHDL语言编写的IIC总线通信的写操作的底层程序-VHDL language of the IIC bus communication of the write operation of the underlying process
example
- 我FPGA开发板的程序！！！包括数、码管iic、VGA、乘法器、串口。加法器、比较器、状态机等等等了，主要是VHDL的也有部分好似Verilog的。参考下吧-verilog...vga..uart...add...etc..
I2C
- 一种IIC的vhdl实现，包含相关sourcecode和协议文档，学习verilog hdl的好资料。-A kind of IIC' s vhdl implementation, the agreement contains the relevant sourcecode and documentation, learning verilog hdl good information.
IICComponent
- IIC的vhdl实现，用ISE12.1建的项目，读取eeprom的接口代码-using FPGA to communicate with the EEPROM through IIC connector
oc_i2c_master
- IIC总线的控制VHDL源代码以及说明，在Quartus2中能够生成对应的IP核-the IIC bus control VHDL source code and ，Quartus2 can create the corresponding IP in nuclear
Altera_I2C_example
- IIC VHDL代码。标准的IIC 总线协议（VHDL）-IIC VHDL
vhdl
- IIC源码VHDL文件。包括IIC master端的控制器实现及仿真文件。-IIC of VHDL source。Including IIC master controller implement and testbench.
IIC-bus-communication
- IIC通信的VHDL实现，含有IIC的通信标准，能正常使用-IIC communication bus program
iic
- 用vhdl实现iir总线仿真 对于vhdl初学者很有帮助-Iir bus simulation using vhdl
iic-BUS
- I2C/IIC 总线接口驱动，在Altera的FPGA上跑过，VHDL编写-I2C/IIC bus interface driver, running over the FPGA
I2CHDL
- IIc时序逻辑的VHDL源代码，便于时序的调试(VHDL source code of IIc time series logic, easy to debug time series)